Reference Architecture for Embedded PQC: Layering ML-KEM, ML-DSA and LMS Across Boot, Session and Fieldbus Domains

There is no single right post-quantum algorithm for an embedded fleet. The architecture choice is where each primitive runs: stateful hash-based signatures (LMS/XMSS, NIST SP 800-208, RFC 8554/RFC 8391) for root-of-trust boot verification, ML-DSA (FIPS 204) for updatable certificates and OTA manifests, and ML-KEM (FIPS 203) in hybrid key exchange (X25519MLKEM768, per the IETF TLS hybrid design work) for TLS 1.3 sessions. The main trade-off is between end-to-end PQC on every ECU and ending PQC at an HSM-backed domain gateway. Message size, RAM, boot-time budget and how much interoperability you need decide which one is viable.

Domain-split decision criteria

Use LMS/XMSS only for boot ROM or first-stage verification when signing is centralized in an HSM that can guarantee one-time state use. Use ML-DSA-44/65 wherever signers are distributed or stateless operation is required. Use hybrid ML-KEM-768 for gateway and backend TLS 1.3. On classic CAN or CAN FD segments with nodes below roughly tens of KB of free RAM, end PQC at the domain gateway and protect the segment with symmetric authentication (for example AUTOSAR SecOC with AES-CMAC) using keys distributed by the gateway.

Pre-specification checklist

For each node, list RAM, flash, worst-case stack, maximum frame payload (CAN FD 64 B, Ethernet MTU 1500 B), boot-time budget, HSM class (SHE vs full EVITA-style HSM), certificate chain depth and device service life compared with your migration deadline (for example the NSA CNSA 2.0 timelines). Fix algorithm identifiers from final FIPS documents and IETF LAMPS/TLS specifications. Require validation against NIST ACVP/CAVP test vectors before integration, and map the requirements to ISO/SAE 21434 and IEC 62443-4-2.

Illustrative scenario with rollout and recovery

This is an analytical example, not a measurement. An ML-DSA-44 signature is 2420 B, so on a 64 B CAN FD payload it needs about 38 frames before transport-protocol overhead. That rules out per-message signing on the bus, so verification belongs at the gateway. Roll out in phases. First ship dual-signed manifests (ECDSA plus ML-DSA, both checked). Then require ML-DSA under a policy flag. Recover through A/B firmware slots, monotonic anti-rollback counters, LMS state reservation backed up in the HSM, and a policy that rejects downgrade to classical-only modes.

When should an embedded ECU verify ML-DSA signatures itself instead of relying on a gateway that terminates post-quantum cryptography?

An ECU should verify ML-DSA locally when three conditions all hold: it accepts code or configuration from more than one trust path, its threat model includes a compromised gateway, and it has the RAM, stack and verification time for FIPS 204 verification within its boot or update budget. If any of these fails, end PQC at an HSM-backed gateway and use symmetric authentication on the segment. Write down the assumption that the gateway is a trust anchor and include it in your ISO/SAE 21434 analysis. In either case, confirm conformance with NIST ACVP vectors, test that downgrade attempts are rejected, and keep an A/B rollback path with anti-rollback counters so that a faulty PQC update cannot brick the device.

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Engineering & Architecture Brief

Reference Architecture for Embedded PQC: Layering ML-KEM, ML-DSA and LMS Across Boot, Session and Fieldbus Domains

There is no single right post-quantum algorithm for an embedded fleet. The architecture choice is where each primitive runs: stateful hash-based signatures (LMS/XMSS, NIST SP 800-208, RFC 8554/RFC 8391) for root-of-trust boot verification, ML-DSA (FIPS 204) for updatable certificates and OTA manifests, and ML-KEM (FIPS 203) in hybrid key exchange (X25519MLKEM768, per the IETF TLS hybrid design work) for TLS 1.3 sessions. The main trade-off is between end-to-end PQC on every ECU and ending PQC at an HSM-backed domain gateway. Message size, RAM, boot-time budget and how much interoperability you need decide which one is viable.

Domain-split decision criteria

Use LMS/XMSS only for boot ROM or first-stage verification when signing is centralized in an HSM that can guarantee one-time state use. Use ML-DSA-44/65 wherever signers are distributed or stateless operation is required. Use hybrid ML-KEM-768 for gateway and backend TLS 1.3. On classic CAN or CAN FD segments with nodes below roughly tens of KB of free RAM, end PQC at the domain gateway and protect the segment with symmetric authentication (for example AUTOSAR SecOC with AES-CMAC) using keys distributed by the gateway.

Pre-specification checklist

For each node, list RAM, flash, worst-case stack, maximum frame payload (CAN FD 64 B, Ethernet MTU 1500 B), boot-time budget, HSM class (SHE vs full EVITA-style HSM), certificate chain depth and device service life compared with your migration deadline (for example the NSA CNSA 2.0 timelines). Fix algorithm identifiers from final FIPS documents and IETF LAMPS/TLS specifications. Require validation against NIST ACVP/CAVP test vectors before integration, and map the requirements to ISO/SAE 21434 and IEC 62443-4-2.

Illustrative scenario with rollout and recovery

This is an analytical example, not a measurement. An ML-DSA-44 signature is 2420 B, so on a 64 B CAN FD payload it needs about 38 frames before transport-protocol overhead. That rules out per-message signing on the bus, so verification belongs at the gateway. Roll out in phases. First ship dual-signed manifests (ECDSA plus ML-DSA, both checked). Then require ML-DSA under a policy flag. Recover through A/B firmware slots, monotonic anti-rollback counters, LMS state reservation backed up in the HSM, and a policy that rejects downgrade to classical-only modes.

Technical FAQ: When should an embedded ECU verify ML-DSA signatures itself instead of relying on a gateway that terminates post-quantum cryptography?

An ECU should verify ML-DSA locally when three conditions all hold: it accepts code or configuration from more than one trust path, its threat model includes a compromised gateway, and it has the RAM, stack and verification time for FIPS 204 verification within its boot or update budget. If any of these fails, end PQC at an HSM-backed gateway and use symmetric authentication on the segment. Write down the assumption that the gateway is a trust anchor and include it in your ISO/SAE 21434 analysis. In either case, confirm conformance with NIST ACVP vectors, test that downgrade attempts are rejected, and keep an A/B rollback path with anti-rollback counters so that a faulty PQC update cannot brick the device.

Related Architecture Specifications (PQCECOSYSTEM): pqcaa.com · pqcsmartaccount.com · wcbdcvault.com

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